Changes
/* Why MiST-board final platform */
==== Metal case ====
It's a true final platform.
=== Why ZX-Uno platform ===
==== Jepalza port ====
Jepalza has ported FPGAmstrad on it, A lot of thanks Jepalza !
==== Same FPGA as NEXYS2 500kgates starter kit ====
It's the opportunity to update the original simple prototype schematic.
==== low-cost FPGA ====
==== simple and over-documented ====
As the original, it is using simple components.
===== simple VGA =====
It is using a 640x480 centered VGA display at 60Hz. As the VGA hello world.
A special RAM is used to be written at the Z80 speed and readden at VGA speed.
===== simple DSK =====
A dsk here is simply flatten into RAM parts.
DSK is read only (you can write into deployed DSK in RAM, but not save it back into SDCARD)
===== simple bootloader =====
The bootloader is read-only, loading data using SPI protocol, and slave of a FAT32 state machine deploying this data into RAM just before turning on Z80.
===== simple disk selection =====
The first disk is inserted at boot, and the "page-up" bottom does reset+insert the next disk. If no more disk left, the first disk is inserted back (Carousel)
Pressing "page-up" a long time does a sort of "random disk insert".
===== simple GateArray =====
Just implementing one version of Amstrad GateArray : the CRTC0.
==== Xilinx schematics ====
Schematics, as on original, are quite small, except the motherboard on that is comparable to original CPC motherboard schematic.
==== fork and merge ====
This version of FPGAmstrad is a 2011's fork of NEXYS2's FPGAmstrad, merged with last validated components of MiST-board version.
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