Changes
Z80
,/* Oddities */
* The 16-bit commands ADD HL,ss, ADC HL,ss and SBC HL,ss exist but not the command SUB HL,ss
* The NOP instruction takes 4 cycles. This is the minimum amount of cycles an instruction can take.
* Instructions IN r,(C) and OUT (C),r surprisingly take 4 NOPs with CPC timings, even though they are listed as 12 (4,4,4) cycles on the datasheet. This happens because I/O access is not synchronised aligned with memory access.
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