{|{{Prettytable|width: 700px; font-size: 2em;}}
|''Mnemonic''||''Clock''||''Size''||''SZHPNC''||''Opcode''||''Description||''Notes''
|- style="background:#efefef;"
|ADC A, r||4||1||*** V0 *||88 + rb||rowspan=4|Add with Carry||rowspan=4|A = A + s + CY |- style="background:#efefef;"|ADC A, N||7||2||ES XX|- style="background:#efefef;"|ADC A, (HL)|| 7||1||||8E|- style="background:#efefef;"|ADC A, (IX + N)||19||3||||DD 8E XX
|-
|ADC A, (HL), BC||715||12||**? V0 *||8EED 4A||rowspan=4|Add with Carry||rowspan=4|HL = HL + + ss CY
|-
|ADC AHL, (IX + N)||1915||3||||DD 8E XX 2|||| ED 5A
|-
|ADC HL, BCHL||15||2|| **? V0 *||ED 4A||Add with Carry||HL = HL + + ss CY 6A
|-
|ADC HL, SP||15||2||||ED 5A7A|- style="background:#efefef;"|ADD A, r|| 4||1||*** V0 *||80 + rb||rowspan=5|Add (8-bit)||rowspan=5|A = A + s |- style="background:#efefef;"|ADD A, N||7||2||||C6 XX |- style="background:#efefef;"|ADD A, (HL)||7||1||||86|- style="background:#efefef;"|ADD A, (IX + N)||19||3||||DD 86 XX|- style="background:#efefef;"|ADD A, (IY + N)||19||3||||FD 86 XX
|-
|ADC ADD HL, HLBC||1511||21||--?- 0 *||ED 6A09||rowspan=4|Add (16-bit)| |rowspan=4|HL = HL + ss
|-
|ADC ADD HL, SP||1511||2||||ED 7A1||||19
|-
|ADD AHL, rHL||411||1||*** V0 *||80 + rb||Add (8-bit)||A = A + s 29
|-
|ADD A, N||7||2||||C6 XX|||| |-|ADD A, (HL)||7||1||||86 |||| |-|ADD A, (IX + N)||19||3||||DD 86 XX|||| |-|ADD A, (IY + N)||19||3||||FD 86 XX|||| |-|ADD HL, BC||11||1||--?- 0 *||09||Add (16-bit)||HL = HL + ss |-|ADD HL, ||11||1||||19|||| |-|ADD HL, HL||11||1||||29|||||-|ADD HL, SP||11||1||||39||||
|-
|ADD IX, BC||15||2||--?- 0 *||DD 09||Add (IX register)||IX IX + pp =