So external RAM expansions can differ in their behaviour regarding &C3 mode. See [https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/464-preasic-c3-ram-configuration-and-rom-7/ Discussion on the forum] and [https://www.cpcwiki.eu/forum/amstrad-cpc-hardware/dk%27tronics-ram-c3-selection-464/ Another discussion]
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== PAL I/O port ==
Note that no settings are stored in the Gate Array itself regarding the MMR register. But the PAL and Gate Array share an I/O port address so that it appears to be the same chip to the programmer.
Bit14 of the PAL selection address can be at 0 or 1 on CPCs equipped with CRTCs 3, 4.
It must be at 1 on CRTCs 0, 1 and 2 (The result is not guaranteed).
For compatibility reasons, it is strongly advised to always set bit14 to 1 to select PAL.
Furthermore, if bit14=0 then CRTC will be selected too.
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