Normally, you never see the content of this register. But it leaks through F5 and F3 in the BIT b,(HL) instruction. [https://zx-pk.ru/attachment.php?attachmentid=2989 Source]
|-
| Q || 8-bit || Internal register where it assembles the new content of the F register, before moving it back to F || On Zilog NMOS Z80, when the instruction doesn't compute new flags, this register is cleared instead. But not on NEC NMOS Z80. And CMOS Z80 behave in a different way too. Normally, you never see the content of this register. But it leaks through F5 and F3 in the SCF/CCF instructions. [https://worldofspectrum.org/forums/discussion/41704 Source] Emulating Q is not strictly necessary. A 1-bit flag, indicating whether the previous instruction computed flags, is enough to emulate the behaviour of SCF/CCF. [https://github.com/hoglet67/Z80Decoder/wiki/Undocumented-Flags#scfccf Source] Also note that while POP AF and EX AF,AF' modify F, they do not compute new flag values.
The explanation above is just a simplification. Latest research on the subject (May 2024) show that '''SCF/CCF instructions are unstable'''. [https://github.com/hoglet67/Z80Decoder/wiki/Unstable-CCF-SCF-Behaviour Source]