* * Some exceptions exist
* All instructions containing (IX/IY+d) add 3µs and 2 bytes compared to their (HL) variants
* Contrarily to what the syntax of the instructions JP (HL/IX/IY) suggest, PC will be loaded with the contents of the register itself, not the indexed value. Those instructions should be understood as JP HL/IX/IY== Oddities ==
* Despite having different names and opcodes, RETI and RETN are in fact the exact same instruction
* Contrarily to what the syntax of the instructions JP (HL/IX/IY) suggest, PC will be loaded with the contents of the register itself, not the indexed value. Those instructions should be understood as JP HL/IX/IY
* While the syntax of ADD, ADC and SBC all explicitely mention the A register, the SUB instruction does not mention it
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