The HSYNC width value is interpreted differently between CRTCs. On CRTCs 0/1, if 0 is programmed no HSYNC is generated. On CRTCs 2/3/4, if 0 is programmed this gives a HSYNC width of 16.
On CRTCs 3/4, HSYNC occurs 1µs later than on CRTCs 0/1/2.
CRTCs 1/2 have a fixed VSYNC width value of 16. VSYNC width can be configured with R3 on CRTCs 0/3/4. If 0 is programmed this gives 16 lines of VSYNC.
On CRTCs 0/1/2, the sole condition to trigger a VSYNC is that VCC=R7. While on CRTCs 3/4, it is necessary to have VCC=R7 and HCC=0 and VLC=0 to trigger a VSYNC.
Also, on CRTCs 3/4, HSYNC occurs 1µs later than on CRTCs 0/1/2.
On all CRTCs, a new VSYNC cannot be triggered if VSC!=0. So we cannot trigger a new VSYNC during a VSYNC. The same goes for HSYNC.