If the instruction produces output other than in the flags (i.e. all except BIT), then the result gets placed both into (IX+d) or (IY+d) and into the register one would normally expect to be altered.
DDCB and FDCB-prefixed instructions only increment the R register twice. This has been confirmed on [https://stackoverflow.com/questions/8540518/z80-memory-refresh-register#comment25506533_16222002 Stack OverflowSource]
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