Note that no settings are stored in the Gate Array regarding register 3, but the PAL and Gate Array share an I/O port address.
Bit14 of the PAL selection address can be at 0 or 1 on CPCs equipped with CRTCs 03, 1, 24. It must be at 1 on CRTCs 3 0, 1 and 42 (The result is not guaranteed).
For compatibility reasons, it is strongly advised to always set bit14 to 1 to select PAL.
20 OUT &7F00,&C7:POKE &4000,&C7:OUT &7F00,&C0
30 IF PEEK(&4000)=&C7 THEN PRINT"PAL chip absent/inactive":END
40 OUT &BC00,&F:OUT &3DFF3FFF,&C750 IF PEEK(&4000)=&C7 THEN PRINT"PAL I/O layout on CRTC Bit 14=0/1/2PAL Select":END60 IF PEEK(&4000)=&C0 THEN PRINT"PAL I/O layout on CRTC 3/4Bit 14=0 PAL not selected":END
70 PRINT"Error!"
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