Changes

V9990

273 bytes added, 15:29, 30 January 2019
/* BMXL */
* When the vram address is calculated from dx and dy, dx and dy are masked before use.
This means that transfer wraps within the same line and column. i.e. if drawing in reverse and overlapping x=0, and width is 256, then pixels will wrap to 256-x on the same line and if overlapping x=256 then pixels will wrap to 0.
 
==== LMMC ====
 
* A new byte is fetched only when the pixels for that byte have been used. For an odd number of pixels in a mode such as 2bpp or 4bpp, this means pixels from a byte will be on the end of the line and the remainder of the pixels are used for the next line.
==== LMMV ====
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