Changes

Jump to: navigation, search

CRTC

87 bytes added, 14 November
/* Mid-VSYNC */
On all CRTCs, in both interlace modes, a mid-VSYNC is generated when VCC=R7 on the even field. The VSYNC pulse starts in the middle of the raster line, at HCC=R0/2.
 
As an exception, on CRTCs 3/4, mid-VSYNC will instead occur on the odd field if R7=0.
=== PPI VSYNC ===
8,999
edits