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/* Misc registers */
Reading from 0x06800-0x06807 will read the same values as for invalid data.
* Writing to &6800 will set the interrupt raster line,* Writing to &6801 will set the screen split line,* Writing to &6802 and &6803 will set the screen split address,* Writing to &6804 will set the soft scroll,* Writing to &6805 will set the interrupt vector (Arnold V specification 1.4).* Writing to &6806 has no effect.* Writing to &6807 has no effect.
For the interrupt raster line, soft scroll and split line please see furthur in this document for details of how the ASIC generates the comparison value to compare against each of these programmed values.
However, I found that with this bit set to 0, there is a bug.
Example showing bug: [ http://www.cpctech.org.uk/source/asicbug.html highlighted ] | [http://www.cpctech.org.uk/source/asicbug.asm original ] ]
A demo program used a single DMA channel to issue an interrupt, a few lines later a raster interrupt would issue an interrupt. The first interrupt executed the correct interrupt handler routine (0,2 or 4), the second executed the interrupt handler for vector of 0 (the raster interrupt is vector 6). This was clearly wrong! My advice is that you should not use the automatic interrupt clear feature.
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