Changes
Z80
,/* ED-prefixed opcodes */
The opcodes that are not mentioned in the following table are EDNOP (ED-prefixed NOP instruction). Thay have no effect but take 8 cycles and increment the register R two times. A pair of ED prefixes is also an EDNOP.
Here's the rewritten table with each sub-table having 8 rows and twice as many sub-tables:
{| style="white-space: nowrap;"
|-
| 47 || LD I,A
|}
|
{| class="wikitable"
! Opcode !! Mnemonic
|-
| 48 || IN C,(C)
| 4F || LD R,A
|}
|
{| class="wikitable"
! Opcode !! Mnemonic
|-
| 57 || LD A,I
|}
|
{| class="wikitable"
! Opcode !! Mnemonic
|-
| 58 || IN E,(C)
| 5F || LD A,R
|}
|
{| class="wikitable"
! Opcode !! Mnemonic
|-
| 67 || RRD
|}
|
{| class="wikitable"
! Opcode !! Mnemonic
|-
| 68 || IN L,(C)
| 6F || RLD
|}
|
{| class="wikitable"
! Opcode !! Mnemonic
|-
| 76 || '''IM 1'''
|-
| 77 || '''EDNOP'''
|}
|
{| class="wikitable"
! Opcode !! Mnemonic
|-
| 78 || IN A,(C)
|-
| 7E || '''IM 2'''
|-
| 7F || '''EDNOP'''
|}
|-|
{| class="wikitable"
! Opcode !! Mnemonic
|-
| A3 || OUTI
|}
|
{| class="wikitable"
! Opcode !! Mnemonic
|-
| A8 || LDD
|-
| AB || OUTD
|}
|
{| class="wikitable"
! Opcode !! Mnemonic
|-
| B0 || LDIR
|-
| B3 || OTIR
|}
|
{| class="wikitable"
! Opcode !! Mnemonic
|-
| B8 || LDDR
