UM6845:
Bits 7..6 define the skew (delay ) of the CUDISP signal.Bits 5..4 define the skew (delay ) of the DISPTMG signal.
Bits 3..2 are ignored.
Bits 1..0 define the interlace mode.
Pre-ASIC/ASIC:
Bits 7..6 define the skew (delay ) of the CUDISP signal.Bits 5..4 define the skew (delay ) of the DISPTMG signal.
Bits 3..2 are ignored.
Bits 1..0 define the interlace mode.