Changes
/* TODO : PPI */
==== TODO : CRTC clock/GA clock ====
CTRC has sure a clock. GA shall have a clock as it contains the r52 counter. r52 seems a consequence of CRTC VHSYNC, but in my last experimentations, I deduce that VSYNC and Z80_INT signal have to be fires at the same time... damn.
=== TODO : a better border heuristic ===
Using winape testbench (plustest), test 2 does show somes problems while border does go out of screen, negative border does hide line itself.
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