Changes
/* The meaning and the Addresses of the registers */
== The meaning and the Addresses of the registers ==
=== Register 0 (Port F8E0h) Indirect Data ===
This register transfers data from and to a indirect register.
=== Register 1 (Port F8E1h) Handshake signals ===
This register transfers the data from and to the I/O port of the chip. If you use V24 you can request handshake signals from this port. In this interface the following bits have this meaning:
Bit 0: DTR (Data Terminal Ready)
Bit 4-7: not used
=== Register 2-7 (Port F8E2h-F8E7h) Interrupt related ===
These registers are used by the interrupt handler. If you want to know
what you can do with this registers please write to Mostek for support.
=== Register 8 (Port F8E8h) Indirect Index ===
Bit 3-7 are used by the interrupt handler. With bit 0-2 you can choose the indirect register.
=== Register 9 (Port F8E9h) Timer Controls ===
Control register for timer A and B. You needn't to use the timer for a V24 interface.
=== Register 10 (Port F8EAh) Timer B ===
Timer B value
=== Register 11 (Port F8EBh) Timer A===
Timer A value
=== Register 12 (Port F8ECh) Mode Control ===
USART-register. Change the connect-parameters.
Bit 7 6 5 4 3 2 1 0
please always set on 0
=== Register 13 (Port F8EDh) Rx Status ===
Receiver status. You need only the following bits:
Bit 0: Receiver-Enable, set to 1 if receiving is possible.
received then the interface send memory full).
=== Register 14 (Port F8EEh) Tx Status ===
Sending status. Again you need only two bits:
Bit 0: Sending-Enable, must set to "1" if sending is allowed.
be used to ask if a word is send or not.
=== Register 15 (Port F8EFh) Rx/Tx Data ===
This is the send and receive register. Here you can get a word or send a word.
