Changes
6502
,/* Chip Variants */
* The 6502 core used inside the [[NES]] is missing the Decimal Mode feature.
* The 6507 CPU, used in the [[Atari VCS]], has only 13 address lines. So it can only address 8KB instead of 64KB. It also lacks the IRQ and NMI interrupt lines.
* The 6510 CPU, used in the [[Commodore 64]], is a 6502 with an additional AEC pin that puts the bus in high impedance mode. It also includes a 6-bit I/O port that occupies addresses 0 and 1.
* The 6502C used in [[Atari 8-bit ]] computer range, adds an additional HALT pin. The 6502C is otherwise a regular NMOS 6502, not to be confused with the CMOS 65C02.
* The CMOS 65C02 fixed multiple bugs of the original NMOS 6502, but also removed access to all illegal instructions. Some cycle counts have been modified and some extra instructions have been added. In fact, there are multiple implementations of the 65C02 (WDC 65C02, WDC 65C02S, Rockwell R65C02, CSG 65CE02, ...), each with its own variant of the instruction set.
* The HuC6280, used in the [[PC-Engine ]] gaming console, is an improved version of the CMOS 65C02.
* The 6581665C816, used in the [[SNES ]] and the [[Apple IIGS]], is a 16-bit version of the 65C02. It contains a compatibillity mode, enabled by default upon reset, that makes it behave like a regular 65C02. * The Sony SPC700 sound CPU used inside the SNES also behaves similarly to a 6502 with some extensions. [https://snes.nesdev.org/wiki/SPC-700_instruction_set Source]
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