Changes

PWM

23 bytes added, 22:18, 18 September 2017

entity PWM is

port (

clk : in std_logic; -- 50MHz : higher than dog and cat frequency, a multiple of clk_ref

clk_ref : in std_logic; -- 1MHz : same one as sound chip clk

PWM_in : in std_logic_vector (7 downto 0) := "00000000";

1,200

edits