In 464 mode :
* the /ROM2 signal is always high : ROM7 selection is not handled on board.
* the /CAS1 signal is always high : RAM extension is not handled on board.
In 6128 mode :
* the /ROM2 signal is handled on board.* the /CAS1 like AMSDOS ROM is handled on board6128/DDI1. When /EXT tied low, with the expected result of getting garbage instead of base RAM /ROM2 will be active when using RAM selection other than C0ROM7 is selected. When /EXT is floating (ie pulled up), /ROM2 will be active when ROM0 is selected.* CPC does 464 will get stuck after displaying the copyright message and before the "BASIC 1.0" messageas nothing is connected to /ROM2.* the /CAS1 is handled on board. On 464, expect garbage instead of base RAM when using RAM selection other than C0 and no RAM extension connected.
==Extension RAM management==
In 6128 mode :
* Garbage On a 464, garbage all the way on extension RAM with no extension connected, as expected as no ram is there ;D.* adding 41464 in the alternate footprint and connected to CAS1 instead of CAS0 may transform the 464 in 4128
* With an extension, C3 is working as expected
* adding 41464 in the alternate footprint and connected to CAS1 instead of CAS0 may transform the 464 in 4128 ;)
==ROM7 and ROMDIS in 6128 mode==
* Well, no luck. ROMDIS does not prevent internal ROM7 to be selected, as on regular 6128, unlike plus range.* ROMDIS act as an output when ROM7 is selected (However I need to re-check that it is TBC : only happening on ROM 7ROM7/0 ?)* ROMDIS act as the DDI DDI1 ROMDIS as it is active even during ram access 10943-0accesses.<br />The following picture shows the ROM detection routine : Selection of ROM7, followed by a read at 0xC000 where ROMDIS is active as well as /ROM2
[[File:CPC464PREASIC 6128mode ROM7.png]]
==/EXP==
When the On a 464, when no DDI1 extension is not plugged, /EXP is pulled high, and . /ROM2 signal is in fact active as ROM0 and replace the BASIC. As no ROM is connected, it just crash !<br />On a 6128, /EXP is permanently tied to GND.
==Bonus==
* on In the following pageamendment service manual, Gate Array and ASIC Pin-Outs - CPCWiki, pin pins 35 and 36 are undocumented.* on However, according to the PCB in the amendment service manualmask, these to pins goes to the FDC thru through links : pin 35 to DATA, pin 36 to WINDOW 10945-1* Amstrad was designing its own data separator and planned to use it on this version of the CPC. But As hinted in [[Arnold_V_specs]], it was not ready.
[[File:6128 PreAsic PCB.png]]
* Looks like amstrad was designing its own data separator and planned to use it on this version of the CPC. But As hinted in Arnold V specs - CPCWiki, it was not ready.