Three new memory mapped registers have been added within the ASIC, to provided a horizontally split screen facility. One at address 6801h defines the scan line after which the screen split occurs. A value of zero (as at power on reset) will turn this feature off.
The other register pair at 6802h and 6803h define the start address in memory (similar to same number form as R12 and R13 respectively in the 6845, and therefore high byte first) which represents the location in memory from which to start displaying data for the lower screen. This allows value is read when the lower part of 6845's Horizontal counter matches Horizontal Displayed (R1) on the picture line programmed, it is stored to come from a separate memory area and be separately scrolled. However, note that soft scrolling (Section 2.5 below) acts used on the whole screennext line.
Note that care should be taken with programming this facility such that This allows the screen split does not alter the function lower part of address bits A1-A8 and the dynamic picture to come from a separate memory refresh is not upset. This can area and be accomplished by setting the start of the second screen to lie on 16k boundaryseparately scrolled. The value in register pair 6802h/6803h is the first displayed line, and not the start address of the 16k blockis loaded into 6845's MA counter. AlsoHowever, during vertical retrace, the value in register 6801h should not be set to 257 less the total number of scan lines on the screen. With a normal screen of 312 scan lines, the value 312 - 257 = 55, or 37h should not be programmed unless (1) the vertical total adjust register is set to 1 while 6801h contains 37h, or note that soft scrolling (2) the raster interrupt (see Section 2.4 5 below) should be used such that 6801h contains 0 during vertical retraceacts on the whole screen.
Note that care should be taken with programming this facility such that the screen split does not alter the function of address bits A1-A8 and the dynamic memory refresh is not upset. This can be accomplished by setting the start of the second screen to lie on 16k boundary.
The value in register pair 6802h/6803h is the first displayed line, and not the start address of the 16k block.
Also, during vertical retrace, the value in register 6801h should not be set to 257 less the total number of scan lines on the screen.
The split line is 8-bit only and has a range of 0-255 and will wrap around (255->0). A normal screen has 312 scanlines. This means that with some values, the counter will wrap and the split line will occur 2 times. With a normal screen of 312 scan lines, the value 312 - 257 = 55, or 37h should not be programmed, otherwise instead of seeing a split at line 55, you see a split at line 2. To avoid this (1) the vertical total adjust register is set to 1 while 6801h contains 37h (or some other value where the wrap will occur before the new frame starts), or (2) the raster interrupt (see 2.4 below) should be used such that 6801h contains 0 during vertical retrace so that it is disabled and doesn't wrap.
===Programmable raster interrupt===