AMSSIO-II is a newer version, using a 44pin 16C850CJ instead of the 24pin MC6850. Aside from the schematic (see below), there is no documentation or source code for AMSSIO-II. I/O base address can be FBE0h or FBF0h (jumper-selectable). Unlike the previous versions, this version also connects to the Z80's interrupt input.
The "PC" attached to the "16C850CJ" part number (labeled as "16C850CJPC" in schematic) is meant to say that the chip is wired to "PC Mode" (SEL, Pin 34 = GND). In the PC Mode, the chip tries to decode PC ISA bus addresses (COM1-4 = 3F8h,2F8h,3E8h,2E8h), some address lines are swapped, so the AMSSIO maps to FBE0h or FBF0h (selected by S1 input) whilst the chip "thinks" it is mapped to COM3/COM4 ISA bus addresses (3E8h/2E8h).''Unclear: the jumper on S1 should change "A8" - but the schematic is wired as if "A4" changes - which would require a jumper on S2, not on S1 (?)''
* [[Media:XR16C850.pdf]] - 16C850 Datasheet