Changes

* A == Usage in CPCs == Used by [[Aleste 520EX]]: EEXXh Aleste 8251 USART chip (RS232/Mouse) Data (R/W) EFXXh Aleste 8251 USART chip (RS232/Mouse) Control/Status (R/W) Uses a KR580WW51A (russian clone of the 8251) is used by [[Aleste 520EX]], clock . Clock source comes from a [[8253 chip]].* A 8251 is said to be used ---- Used by [[Cirkit serial interface]], clock : Clock source and I/O ports Ports are unknown. == Registers == === Control Register (W) ===The first write after internal or external Reset is the "Mode Instruction": 0-1 Baud Rate Divider (0=Sync Mode, 1=Div1, 2=Div16, 3=Div64) 2-3 Character Length (0=5bit, 1=6bit, 2=7bit, 3=8bit) 4 Parity Enable (0=Disable, 1=Enable) 5 Parity Type (0=Odd, 1=Even) In Async mode: 6-7 Stop Bits (0=Reserved, 1=1bit, 2=1.5bit, 3=2bit) In Sync mode: 6 External Sync Detect (0=Syndet is an output, 1=Syndet is an input) 7 Single Character Sync (0=Double Character, 1=Single Character)If (only if) the above 1st write selected Sync Mode, then 2nd/3rd write are: 2nd write - Sync Character 1 3rd write - Sync Character 2All further writes to the Control Register are "Command Instructions": 0 Transmit Enable (0=Disable, 1=Enable) 1 Data Terminal Ready (0=No, 1=Yes) (DTR Pin) 2 Receive Enable (0=Disable, 1=Enable) 3 Send Break Character (0=Normal, 1=Force TxD "low") 4 Error Reset (0=No change, 1=Reset Error Flags) 5 Request to Send (0=No, 1=Yes) (RTS Pin) 6 Internal Reset (0=No change, 1=Reset; expect new Mode Instruction) 7 Enter Hunt Mode (0=No, 1=Search Sync Characters; Sync Mode only) === Status Register (R) === 0 Transmit Ready (0=Busy, 1=Ready; "DB Buffer Empty") 1 Receive Ready 2 Transmit Empty 3 Parity Error 4 Overrun Error 5 Framing Error 6 Syndet/Brkdet 7 Data Set Ready (DSR Pin) === Data Register (R/W) === 0-7 Data