|}
== Aleste RAM Mapper Ext Port ==
Four I/O ports control the mapper:
{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''I/O'bit''||'''Decoded as'''||'''Page'''||'''Memory region'''Action
|-
|#7CXX7||%0xxxxx00 xxxxxxxx||page 0||&0000-&3fffnot used
|-
|#7DXX6||%0xxxxx01 xxxxxxxx||page 1||&4000-&7fffnot used
|-
|#7EXX5||%0xxxxx10 xxxxxxxx||page if 0, then AY is accessed when read/write to 8255 port A, if 1 then real-time clock is accessed with read/write to 8255 port A. When real-time clock is selected, bits 2||&8000..0 of PPI port C are used to define real-&bffftime clock operation. DS bit 2, AS bit 1, R/W bit 0. So combinations are 2, write address, 4 write data, 5 read data.
|-
|#7FXX4||%0xxxxx11 xxxxxxxxEnable 8253 timer. Any I/O write then accesses 8253 with data comming from 8255 port A. Bit A0/A1 of I/O port defines 8253 register|-|page 3||&c000force video to black|-&ffff|2||enable/disable MAPMOD (changes how colour is decoded and how mapper values are decoded),|-|1||Enables high resolution in X. Also changes some clock frequences. Controls decoding of video address.|-|0||Not fully understood yet. Controls decoding of video address
|}
The decoding of the I/O port for the mapper uses bit 15 of the I/O address in the same way as the Aleste "Gate Array".
Bit 9,8 define which page.
To avoid writing to the Aleste "Gate-Array" bits 7 and 6 of the data must be 1.
The remaining bits define the RAM block/configuration to use.
In CPC mode, writing to the mapper changes the RAM configuration for all pages, with the memory configuration being the same as a DK'Tronics compatible RAM.
In Aleste mapper mode, writing to the mapper changes the RAM for one page.
It is not know:
* Must you write to #7Fxx in CPC mode to define RAM configuration or can you also use #7Cxx, #7Dxx, #7Exx for same effect
* When you write CPC RAM configuration is it mirrored in all mapper registers?
== Aleste 8bit Printer Port ==
* Printer data-bits are connected to AY I/O port B (PSG register 15).
* Printer strobe is connected to PPI 8255 port C bit 4. The strobe is negated by the hardware.
* Printer busy is connected to PPI 8255 port B bit 6.
* All of the above PPI and PSG registers are bi-directional.
This is different as that in the CPC (the CPCs [[Printer Port]] uses Port EFXXh for one-directional 7bit data plus strobe).
== Aleste Gate Array (aka Patasonic's Multiport) ==
|}
=== Gate Array Register 3 (in CPC-style MAPMOD=0) ===
Controls RAM Banking, similar to the Gate Array on CPC6128 (or, more specific, similar to the 16L8 PAL IC which assists the CPC6128s Gate Array).
'''Actually''', it seems to work more like an [[Inicron RAM-Box]] (which isn't fully compatible with the dk'tronics style [[Standard Memory Expansions]]).
=== Gate Array Register 3 (in Aleste's special MAPMOD=1) ===
Four I/O ports control the mapper:
{|{{Prettytable|width: 700px; font-size: 2em;}}
|'''I/O'''||'''Decoded as'''||'''Page'''||'''Memory region'''
|-
|#7CXX||%0xxxxx00 xxxxxxxx||page 0||&0000-&3fff
|-
|#7DXX||%0xxxxx01 xxxxxxxx||page 1||&4000-&7fff
|-
|#7EXX||%0xxxxx10 xxxxxxxx||page 2||&8000-&bfff
|-
|#7FXX||%0xxxxx11 xxxxxxxx||page 3||&c000-&ffff
|}
The decoding of the I/O port for the mapper uses bit 15 of the I/O address in the same way as the Aleste "Gate Array".
Bit 9,8 define which page.
To avoid writing to the Aleste "Gate-Array" bits 7 and 6 of the data must be 1.
The remaining bits define the RAM block/configuration to use.
In CPC mode, writing to the mapper changes the RAM configuration for all pages, with the memory configuration being the same as a DK'Tronics compatible RAM.
In Aleste mapper mode, writing to the mapper changes the RAM for one page.
It is not know:
* Must you write to #7Fxx in CPC mode to define RAM configuration or can you also use #7Cxx, #7Dxx, #7Exx for same effect
* When you write CPC RAM configuration is it mirrored in all mapper registers?
== Upper ROM Bank ==
07h AMSDOS (bytes in 8000h..BFFFh in the Aleste's 64K EPROM)
All other values 01h..02h, 04h..06h, 08h..FFh do select BASIC, too.
== Ext Port ==
{|{{Prettytable|width: 700px; font-size: 2em;}}
|''bit''||Action
|-
|7||not used
|-
|6||not used
|-
|5||if 0, then AY is accessed when read/write to 8255 port A, if 1 then real-time clock is accessed with read/write to 8255 port A. When real-time clock is selected, bits 2..0 of PPI port C are used to define real-time clock operation. DS bit 2, AS bit 1, R/W bit 0. So combinations are 2, write address, 4 write data, 5 read data.
|-
|4||Enable 8253 timer. Any I/O write then accesses 8253 with data comming from 8255 port A. Bit A0/A1 of I/O port defines 8253 register
|-
|3||force video to black
|-
|2||enable/disable MAPMOD (changes how colour is decoded and how mapper values are decoded),
|-
|1||Enables high resolution in X. Also changes some clock frequences. Controls decoding of video address.
|-
|0||Not fully understood yet. Controls decoding of video address
|}
== PPI 8255 ==
| SHIFT | COPY| SPACE | SHIFT | | D | | | F0| F.|ENT|
|________|_____|____________________________|_______|___|___|___| |___|___|___|
== Aleste 8bit Printer Port ==
* Printer data-bits are connected to AY I/O port B (PSG register 15).
* Printer strobe is connected to PPI 8255 port C bit 4. The strobe is negated by the hardware.
* Printer busy is connected to PPI 8255 port B bit 6.
* All of the above PPI and PSG registers are bi-directional.
This is different as that in the CPC (the CPCs [[Printer Port]] uses Port EFXXh for one-directional 7bit data plus strobe).
== Joystick ==