NOTES:
* This document describes the functionality in terms of the CPC with its separate CRTC and Gate-Array. The Plus has both integrated into the same IC, but could be considered to have two functional blocks, one for CRTC and one for Gate-Array. In this document the term 'Gate-Array' is used, but this also applies to the ASIC.
* Much information has been drawn from the [https://shaker.logonsystem.eu/ CRTC Compendium] documentation and , condensed and rearranged for clarity. For details, timing diagrams, code examples, coding tips, and more, refer to that documentation.
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