== Generic System Diagram ==
The Amstrad CPC and Amstrad Plus do not have a DMA controller associated with the FDC. And the clock runs at 4MHz instead of 8MHz.
The DRQ (14), INT (18), VCO SYNC (24), MFM MODE (26), US1 (28), and HEAD LOAD (36) pins are not connected. The TC (16) and RESET (1) pins are connected together. [https://www.cpcwiki.eu/imgs/4/45/CPC6128_Disk_Interface_Schematic.png Source]
[[File:FDC765 - System Diagram.png|800px]]
=== Unconnected Pins ===
The DRQ (14), INT (18), VCO SYNC (24), MFM MODE (26), US1 (28), and HEAD LOAD (36) pins are not connected. The TC (16) and RESET (1) pins are connected together. [https://www.cpcwiki.eu/imgs/4/45/CPC6128_Disk_Interface_Schematic.png Source]
At the end of a successful read or write command, the program should send a ''Terminal Count'' (TC) signal to the FDC. However, in the CPC the TC pin isn't connected to the I/O bus, making it impossible for the program to confirm a correct operation. For that reason, the FDC will assume that the command has failed, and it'll return both Bit 6 in Status Register 0 and Bit 7 in Status Register 1 set. The program should ignore this error message.