| PC (Program Counter) || 16-bit || Points to the next instruction to be executed || Automatically increments as instructions are executed
|}
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== Decimal Mode ==
BCD operations are limited to addition and subtraction using the ADC and SBC instructions.
On NMOS, when Decimal Mode is on, the ADC and SBC instructions update NF, VF and ZF based on the binary result before the decimal correction is applied. Only CF is updated correctly. On CMOS, all the flags are updated correctly, at the cost of 1 additional cycle.
On NMOS, DF is not defined after RESET. On CMOS, DF is automatically cleared on RESET.
On NMOS, DF is unchanged when entering an interrupt of any kind. This can cause unexpected bugs in the interrupt handler if Decimal Mode is on when an interrupt occurs. On CMOS, DF is automatically cleared on interrupt. Upon returning from an interrupt, the processor restores the status register from the stack, including DF.
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On NMOS, NMI or IRQ that happens during specific moments of BRK execution can cause BRK to be effectively skipped. On CMOS, this situation is correctly handled by executing BRK and then servicing the interrupt.
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== Decimal Mode ==
BCD operations are limited to addition and subtraction using the ADC and SBC instructions.
On NMOS, when Decimal Mode is on, the ADC and SBC instructions update NF, VF and ZF based on the binary result before the decimal correction is applied. Only CF is updated correctly. On CMOS, all the flags are updated correctly, at the cost of 1 additional cycle.
On NMOS, DF is not defined after RESET. On CMOS, DF is automatically cleared on RESET.
On NMOS, DF is unchanged when entering an interrupt of any kind. This can cause unexpected bugs in the interrupt handler if Decimal Mode is on when an interrupt occurs. On CMOS, DF is automatically cleared on interrupt. Upon returning from an interrupt, the processor restores the status register from the stack, including DF.
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