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== Chip Variants Oddities ==
* The On NMOS, an indirect JMP will behave unexpectedly when the indirect address crosses a page boundary, because the 6502 core used inside does not add the carry to calculate the address of the high byte. For example, JMP ($19FF) will use the contents of $19FF and $1900 for the JMP address. On CMOS, this issue was fixed, at the cost of 1 additional cycle. In our example, JMP ($19FF) will use the [[NES]] is missing contents of $19FF and $2000 for the Decimal Mode featureJMP address.
* The 6507 CPUSome instructions, used in particularly those involving branches or indexed addressing modes, incur an extra cycle if the Atari VCS, processor has only 13 address linesto cross a memory page boundary. So it can only address 8KB instead of 64KB. It also lacks the IRQ and NMI interrupt linesThis is problematic for time-sensitive code.
* The 6510 CPU, used in the Commodore 64, is a 6502 with an additional AEC pin that the VICConditional jumps are only 8-II uses to kick the CPU off the busbit relative. It also includes a 6And unconditional jumps are only 16-bit I/O port that occupies addresses 0 and 1absolute.
* SimilarlyLDX absolute, the 6502C used in Atari 8-bit computer range, adds an additional HALT pin. The 6502C is otherwise a regular NMOS 6502Y and LDY absolute, X instructions exist but not to be confused with the CMOS 65C02corresponding instructions STX absolute,Y and STY absolute,X.
* The CMOS 65C02 fixed multiple bugs of the original NMOS 6502, CLV (Clear Overflow Flag) instruction exist but also removed access to all illegal instructions. And it added some extra instructions. In fact, there are multiple implementations of not the 65C02 SEV (WDC 65C02, WDC 65C02S, Rockwell R65C02, CSG 65CE02, ...Set Overflow Flag), each with its own variant of the instruction set.
* The HuC6280, used ROR instruction didn't exist in the PCvery earliest (pre-Engine gaming console, is an improved version of the CMOS 65C021977) chips.
* The 65816, used in NOP instruction takes 2 full-cycles. This is the SNES and the Apple IIGS, is a 16-bit version minimum amount of the 65C02. It contains a compatibillity mode, enabled by default upon reset, that makes it behave like a regular 65C02cycles an instruction can take.
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== Oddities Chip Variants ==
* On NMOS, an indirect JMP will behave unexpectedly when the indirect address crosses a page boundary, because the The 6502 does not add the carry to calculate the address of the high byte. For example, JMP ($19FF) will use the contents of $19FF and $1900 for the JMP address. On CMOS, this issue was fixed, at the cost of 1 additional cycle. In our example, JMP ($19FF) will use core used inside the contents of $19FF and $2000 for [[NES]] is missing the JMP addressDecimal Mode feature.
* Some instructionsThe 6507 CPU, particularly those involving branches or indexed addressing modes, incur an extra cycle if used in the processor Atari VCS, has to cross a memory page boundaryonly 13 address lines. This is problematic for time-sensitive codeSo it can only address 8KB instead of 64KB. It also lacks the IRQ and NMI interrupt lines.
* Conditional jumps are only 8The 6510 CPU, used in the Commodore 64, is a 6502 with an additional AEC pin that the VIC-bit relativeII uses to kick the CPU off the bus. And unconditional jumps are only 16It also includes a 6-bit absoluteI/O port that occupies addresses 0 and 1.
* LDX absoluteSimilarly,Y and LDY absolute,X instructions exist but not the corresponding instructions STX absolute6502C used in Atari 8-bit computer range,Y and STY absoluteadds an additional HALT pin. The 6502C is otherwise a regular NMOS 6502,Xnot to be confused with the CMOS 65C02.
* The CLV (Clear Overflow Flag) instruction exist CMOS 65C02 fixed multiple bugs of the original NMOS 6502, but not also removed access to all illegal instructions. And it added some extra instructions. In fact, there are multiple implementations of the SEV 65C02 (Set Overflow FlagWDC 65C02, WDC 65C02S, Rockwell R65C02, CSG 65CE02, ...) , each with its own variant of the instructionset.
* The ROR instruction didn't exist HuC6280, used in the very earliest (prePC-1977) chipsEngine gaming console, is an improved version of the CMOS 65C02.
* The NOP instruction takes 2 full-cycles. This is 65816, used in the minimum amount SNES and the Apple IIGS, is a 16-bit version of cycles an instruction can takethe 65C02. It contains a compatibillity mode, enabled by default upon reset, that makes it behave like a regular 65C02.
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