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CRTC

79 bytes added, 8 July
/* VSYNC */
=== VSYNC ===
 
Bit0 of port B of the PPI is directly connected to the VSYNC pin of the CRTC.
CRTCs 1/2 have a fixed VSYNC width value of 16. VSYNC width can be configured with R3 on CRTCs 0/3/4. If 0 is programmed this gives 16 lines of VSYNC.
Phi2x
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