=== HSYNC ===
Bit0 of port B of the PPI is directly connected to the VSYNC pin of the CRTC.
The HSYNC width value is interpreted differently between CRTCs. On CRTCs 0/1, if 0 is programmed no HSYNC is generated. On CRTCs 2/3/4, if 0 is programmed this gives a HSYNC width of 16.