This register has two different functions depending on bit7 of the data written to this register.
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=== PPI Control with Bit7=0 ===
[[File:8255 Control0.png]]
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=== PPI Control with Bit7=1 ===
In some of these modes, port C is used as a control/status port for port A or B. It can be used to confirm when data transfer may take place, and reflect any other flags. The 8255 PPI is therefore supplied with the added option for the user to set or reset any individual bits in port C.
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=== Mode 0 – Simple Input/output mode ===
[[File:8255 - mode-0.png]]
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=== Mode 1 – Strobed Input/output or Handshake mode ===
[[File:8255 - mode-1.png]]
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=== Mode 2 – Bidirectional Mode ===
[[File:8255 - mode-2.png]]
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=== Port pins summary ===
== Amstrad ASIC PPI ==
*The 8255 PPI is not emulated by the Pre-ASIC. These CPC’s CPCs have a real PPI chip and therefore behave like the first generation of CPC’sCPCs.
*The ASIC PPI does not support Group Modes other than Groupe Mode 0.
*On the ASIC PPI, Port B is always defined as input and Port C is always defined as output.