Changes

PSG

No change in size, 9 June
/* Schematics */
The AY chip has an internal clock divider by 8 which means that it works internally at 125KHz, outputting 125,000 samples per second for each channel.
The BC1 BC2 and A8 pins are always equal to 1 as they are connected to +5V.
== Datasheet ==
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