* From [https://hackaday.com/2012/08/13/taking-a-look-at-decapped-ics/#comment-734991 a comment in the hackaday website]: "Internally this is a microcoded part with a primative controller of NEC’s own design. Testing microcode embedded in a part can be troublesome. The uPD765 had a few extra gates associated with the DMA Request and DMA Ack pins. Presenting a certain illegal combination here places the part into a “test” mode and allows the sequencer microcode to be output on the normal Data pins. The sequencer microcode is responsible for high level commands such as Read Track, Recalibrate, Format Track, or Write Data. There is a similar test mode for the nano-code array which serializes data at the floppy disk head."
== FDC Block Diagram ==
[[File:FDC Intel 8272A block diagram.gif]]