A homemade Testbench done firstly for helping Sorgelig to calibrate it's port of FPGAmstrad into MiSTer.
If the cat doesn't catch the line, this testbench does fail(that's a small palette testbench). First array is about VSYNC length comparable between a real CPC and an emulator. Second array is about interrupt length. Stress is done by inserting NOP, NOPNOP, NOPNOPNOP or else NOPNOPNOPNOP instruction before each measure.
[https://github.com/renaudhelias/RubikCubePaletteCPC/blob/master/JDVPA%236_test/jdvpa6_moustache.dsk jdvpa6_moustache.dsk]