Changes

FPGAmstrad

224 bytes added, 13:09, 1 October 2017
/* Some bad instruction timing analysis */
r005.8.16c4 results :
 
[[File:FPGAmstrad plustest5 r005.8.16c4 part1.png|thumbnail|FPGAmstrad_plustest5_r005.8.16c4_part1]]
[[File:FPGAmstrad plustest5 r005.8.16c4 part2.png|thumbnail|FPGAmstrad_plustest5_r005.8.16c4_part2]]
 
r005.8.16c6 results :
[[File:FPGAmstrad plustest5 r005.8.16c6 part1.png|thumbnail|FPGAmstrad_plustest5_r005.8.16c6_part1]]
[[File:FPGAmstrad plustest5 r005.8.16c6 part2.png|thumbnail|FPGAmstrad_plustest5_r005.8.16c6_part2]]
===== Some bad instruction analysis =====
1,200
edits