16. In WinAPE this counter is reset if a VSYNC occurs which causes the monitor to retrace vertically. This occurs if the VSYNC signal is active and this counter is greater than a threshold set by the V-Hold (normally 295 when V-Hold is 0), or if the counter reaches the maximum value (normally 351 when V-Hold is 0).
17. Since Plus emulation requires more information than simply whether an interrupt is active, this value (as used internally by WinAPE) contains: * Bit 7 - Gate Array (or PRI) interrupt. * Bit 6 - DMA Channel 0 interrupt. * Bit 5 - DMA Channel 1 interrupt. * Bit 4 - DMA Channel 2 interrupt. It can be a combination of all or any interrupt sources. Interrupts are executed in the order raster, DMA 2, DMA 1, DMA 0.
Immediatly It can be a combination of all or any interrupt sources. Interrupts are executed in the order raster, DMA 2, DMA 1, DMA 0. Immediately following the memory dump there is optional data which is seperated separated into chunks.
Each chunk of data has a header and this is followed by the data in the chunk. The header has the following format: