One version called "[[8k Speedlock]]", relied on the fact that the CPC's hardware could reliably read but not write 8k sectors.
the format was either devised or done on an Atari ST or an IBM PC compatible machine (since the CPC share with them the same FDC controler). The main difference being that an ST or PC can write more data per track than a CPC.
In itself, a speedlock track exists in 2 versions, used at the discretion of the duplicator, one use a CRC, and the other not.
A speedlock track consist of only 512 byte declared for the sector, and all the remaining data is spanned in a huge GAP section.
When copied on a CPC, the FDC only store the 512 first bytes as declared in the CHRN, and discard the remaining contained in the gap section. Those tracks have an EDC (Error Data Checksum), because only 512 bytes are used to calculate the data checksum, as well as an illegal data field size.
There were two methods to get around this: