8253 and 8254 are basically the same: both are pin-compatible and software compatible. The difference is that the 8254 supports higher clock frequencies, and it includes a readback feature for the control registers (which are write-only on 8253).
== Registers ==
=== Timer Registers ===
* 8253/8254 Timer 0 Register (R/W)
* 8253/8254 Timer 1 Register (R/W)
* 8253/8254 Timer 2 Register (R/W)
These ports allow to access three decrementing 16bit timers. Assuming that the corresponding Control Registers are set to "LSB-then-MSB", the 16bit reload values (aka divider values) are written in two 8bit fractions:
1st write: LSB of reload value
2nd write: MSB of reload value
For the CPC RS232 interfaces, the baudrates are calculated as such:
Baudrate = 2MHz / reload / prescaler
Where "prescaler" is an additional divider in the DART or 6850 chip. Eg.
300 baud = 2MHz / 01A0h / 16
9600 baud = 2MHz / 000Dh / 16
Note: Reading from the Timer registers does probably return the current counter values rather than the reload value (?) also not sure if/how it freezes between LSB and MSB reads, and how Control bits 4-5 are working exactly.
=== Control Registers ===
* 8253/8254 Timer 0-2 Control Registers (W)
This port allows to configure three write-only 6bit registers: Bit6-7 specify which of the registers is to be updated, Bit0-5 contain the new value for that register.
7-6 Counter Number (0..2=Counter 0..2, and 8253: 3=Reserved, or 8254: 3=Readback)
5-4 Read/Load (0=Latching?, 1=LSB only, 2=MSB only, 3=LSB-then-MSB)
3-1 Mode
0=Interrupt on Terminal Count
1=Programmable One-Shot
2=Rate Generator (short edge, low for 1 period of input clock)
3=Rate Generator (square wave, low for 2nd half of counter range)
4=Software Triggered Strobe
5=Hardware Triggered Strobe
6=Same as Mode 2
7=Same as Mode 3
0 BCD (0=normal, 1=bcd)
When used as RS232 Baudrate Generator (ie. as in the CPC), all three registers should be set to square-wave non-bcd lsb-then-msb (ie. write values 36h, 76h, and B6h to this port).
== Usage in CPC interfaces ==
F9DBh Magic Sound Board - 1st 8254 - Timer 0-2 Control (W)
Clock source for all six timers is (inverted) 4MHz from expansion port.
== Timer Registers ==
* 8253/8254 Timer 0 Register (R/W)
* 8253/8254 Timer 1 Register (R/W)
* 8253/8254 Timer 2 Register (R/W)
These ports allow to access three decrementing 16bit timers. Assuming that the corresponding Control Registers are set to "LSB-then-MSB", the 16bit reload values (aka divider values) are written in two 8bit fractions:
1st write: LSB of reload value
2nd write: MSB of reload value
For the CPC RS232 interfaces, the baudrates are calculated as such:
Baudrate = 2MHz / reload / prescaler
Where "prescaler" is an additional divider in the DART or 6850 chip. Eg.
300 baud = 2MHz / 01A0h / 16
9600 baud = 2MHz / 000Dh / 16
Note: Reading from the Timer registers does probably return the current counter values rather than the reload value (?) also not sure if/how it freezes between LSB and MSB reads, and how Control bits 4-5 are working exactly.
== Control Registers ==
* 8253/8254 Timer 0-2 Control Registers (W)
This port allows to configure three write-only 6bit registers: Bit6-7 specify which of the registers is to be updated, Bit0-5 contain the new value for that register.
7-6 Counter Number (0..2=Counter 0..2, and 8253: 3=Reserved, or 8254: 3=Readback)
5-4 Read/Load (0=Latching?, 1=LSB only, 2=MSB only, 3=LSB-then-MSB)
3-1 Mode
0=Interrupt on Terminal Count
1=Programmable One-Shot
2=Rate Generator (short edge, low for 1 period of input clock)
3=Rate Generator (square wave, low for 2nd half of counter range)
4=Software Triggered Strobe
5=Hardware Triggered Strobe
6=Same as Mode 2
7=Same as Mode 3
0 BCD (0=normal, 1=bcd)
When used as RS232 Baudrate Generator (ie. as in the CPC), all three registers should be set to square-wave non-bcd lsb-then-msb (ie. write values 36h, 76h, and B6h to this port).
== Datasheets ==