Instructions PHA and PHP push the accumulator and processor status onto the stack, while PLA and PLP pull them back. Subroutine calls with JSR store the return address on the stack, and RTS retrieves it to continue execution. Similarly, interrupts (BRK) push the program counter and status, while RTI restores them.
<br>
== I/O Access==
All I/O operations are memory-mapped. There are no port-based I/O instructions. Memory-mapped ports often have different properties than normal RAM:
* Using the ports with instructions other than the Load/Store ones can be very unintuitive.
This is not all negative though. Memory-mapped I/O means that:
* The familiar instructions for accessing memory can be used for I/O, instead of learning a new set of instructions
* It is not necessary to learn about the weird partial I/O address decoding rules
* Chips are directly accessible instead of being chained like how the [[PSG|PSG chip]] has to be accessed through the [[8255|PPI chip]]
<br>