* The NOP instruction takes 2 full-cycles. This is the minimum amount of cycles an instruction can take.
* The 65C02 fixed multiple bugs of the original NMOS 6502, but also removed access to all illegal instructions. And it added some extra instructions. In fact, there are multiple implementations of the 65C02 (WDC 65C02, WDC 65C02S, Rockwell R65C02, CSG 65CE02, ...), each with its own variant of the instruction set. * Fetch-Modify-Store instructions (INC, DEC, ASL, LSR, ROL, ROR) have been optimised on CMOS. When absolute indexed in same memory page, they execute in 6 cycles on CMOS instead of 7 cycles on NMOS.
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