This behaviour exhibited by CRTCs 0/2 demonstrates that, despite their 1MHz clock speed, they can change their state at a rate equivalent to 2MHz chips. They are able to respond to both the rising and falling edges of each clock cycle.
To see it the border bytes with your own eyes, type this BASIC line after reset:
<pre>
BORDER 6:OUT &BC00,6:OUT &BD00,0