==== Signal delay ====
On all CRTCs, there is a 1us 1µs delay in display between when the CRTC provides a video pointer, and when the Gate Array displays the corresponding 16-bit character.
But on CRTCs 0/1/2, there is no delay for HSYNC. On CRTCs 3/4, the Amstrad engineers fixed the issue, the delay is identical for the HSYNC signal.