==== Signal delay ====
There On all CRTCs, there is a 1us delay in display between when the CRTC provides a video pointer, and when the Gate Array displays the corresponding 16-bit character.
On CRTCs 3/4, the delay is identical for the HSYNC signal. While in on CRTCs 0/1/2, there is no delay for HSYNC.
So on CRTCs 3/4, HSYNC occurs 1µs later than on CRTCs 0/1/2.