Changes

8255

55 bytes removed, 5 July
/* The 8255 in the CPC */
The PPI is selected when A11 of the I/O port address is set to "0", A9 and A8 then define the PPI function access (as shown below), A15-A12 and A10 should be "1" (to prevent conflicts with other hardware), A7-A0 are don't care. So, resulting Port addresses are:
{|{{Prettytable|width: 700px; font-size: 2em;}}class="wikitable"|''!I/O address''||''!A9''||''!A8''||''!Description''||''!Read/Write status''||''!Used Direction''||''!Used for''
|-
|&F4xx||0||0||Port A Data||Read/Write||In/Out||[[PSG]] (Sound/Keyboard/Joystick)
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