Bits2..1 of the interrupt vector provided by the ASIC to the CPU are as follows: 00 = DMA chan 2, 01 = DMA chan 1, 10 = DMA chan 0, 11 = DMA raster.
Bit 0 of the interrupt vector provided by the ASIC to the CPU is always 0.
Bit0 of the IVR register controls whether DMA channel interrupts are automatically cleared.