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Gate Array

4 bytes added, 4 July
/* Controlling the Gate Array */
| 1 || 0 || 1 || style="text-align: center;" | n || Plus || RMR2 || ASIC & Advanced ROM mapping || Unlocked ASIC
|-
| 1 || 1 ||colspan=2 style="text-align: center;" | n || All || MMR || Memory RAM memory mapping || PAL
|}
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