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Gate Array

9 bytes added, 4 July
/* Register 3 - RAM Banking */
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=== Register 3 - MMR (RAM Banking Memory mapping) ===
This register exists only in CPCs with 128K RAM (like the CPC 6128, or CPCs with [[Standard Memory Expansions]]). Note: In the CPC 6128, the register is a separate [[PAL16L8|PAL chip]] that assists the Gate Array chip. See its wiki page.
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