Changes

Programming:Crt0Cart

2,881 bytes added, 07:42, 4 June 2022
CRT0 for SDCC and CPC+ CPR carts
This is an example of crt0.asm to use with [http://sdcc.sourceforge.net/ SDCC] compiler.

It should be easy to adapt to other assemblers (it is likely that you won't need all the extra directives for the linker).

I think got most of it from Kevin Thacker's [https://cpctech.cpcwiki.de/ The Unofficial Amstrad WWW Resource], but I can't find the exact link now. Anyway, Kevin is awesome and you should thank him if you have the chance.

.module crt0
.globl _main
.globl _main_init

;; user_isr_hook will be exported so you can get current value
;; from C if you need to (it is defined in USR_ISR_HOOK anyway)
.globl _user_isr_hook

;; the address for the ISR will be in RAM
;; this address is safe is you use double buffer, if you don't
;; use 0xc000 - 3 instead; the stack will be placed after this stack
USER_ISR_HOOK = 0x8000 - 3

.area _HOME
.area _CODE
.area _DATA
.area _INITIALIZER
.area _BSEG
.area _BSS
.area _HEAP

.area _CODE

_main_init::
jp init_cart

;; magic! used to setup the CRCT
.db 0x3f, 0x28, 0x2e, 0x8e, 0x26, 0x00, 0x19, 0x1e, 0x00, 0x07, 0x00, 0x00, 0x30, 0x00, 0xc0, 0x00
end_crtc_data:

.ds 37

;; jump to a memory address that is RAM and we can change to
;; set our ISR
.db 0xc3
_user_isr_hook::
.dw USER_ISR_HOOK

init_cart:
di

;; lower ROM on, mode 0
ld bc, #0x7f88
out (c), c

;; init PPI
ld bc, #0xf782
out (c), c

ld bc, #0xf400
out (c), c

ld bc, #0xf600
out (c), c

;; RAM config
ld bc, #0x7fc0
out (c), c

;; setup CRTC (from 6128 ROM)
ld hl, #end_crtc_data
ld bc, #0xbc0f
crtc_loop:
out (c), c
dec hl
ld a, (hl)
inc b
out (c), a
dec b
dec c
jp p, crtc_loop

;; set the stack
ld sp, #USER_ISR_HOOK

;; dummy int handler
im 1
ld hl, #0xc9fb
ld (USER_ISR_HOOK), hl

ei

call _main

halt0:
halt
jr halt0

.area _DATA
43
edits