* v9990 seems to have a 1 byte read buffer. Setting a partial address and the reading vram will return the data from the previous address for the first read, but further reads returns correct values. This is only true of r3 and r4. e.g. set r3,r4,r5 to &80000. Now set r3 to 1. First read will come from &000000, second and subsequent reads now come from &000001. Now set r4 to 2. First read comes from &000001, second and subsequent reads come from &000201. Now set r5 to 3. First read comes from &030201, subsequent reads come from &030201.
* If vram is set to 128KB a byte is written and then vram is set to 512KB you can read the same byte in multiple locations. The written data is effectively mirrored in the address space.
=== POINT ===