Difference between revisions of "CP/M 3.0"

From CPCWiki - THE Amstrad CPC encyclopedia!
Jump to: navigation, search
(Amstrad's implementation of CP/M+)
(Memory layout)
Line 23: Line 23:
 
=== Memory layout ===
 
=== Memory layout ===
  
* 1st 64KB has the CCP, BDOS, BIOS, screen and firmware. Screen is at &4000-&7fff. Firmware is used. AMSDOS is not used.
+
* 1st 64KB has Amstrad's XBIOS (callable using 'userf'), CCP, BDOS, BIOS, screen and firmware. Screen is at &4000-&7fff. Firmware is used. AMSDOS is not used.
* There is some trampoline code at &c000-&ffff. C1 configuration is used. (this has C7 at &c000-&ffff)
+
* &c1/&c2 are used, so that there is common code at &c000-&ffff. This common code has a small BDOS and BIOS. Most of the functions use trampoline code to transition to bank 0 and call into the XBIOS.
* 2nd 64KB has the TPA and complementary trampoline code. c2 configuration is used.
+
* 2nd 64KB has the TPA and the shared code.
 
a) Page C4 has WBOOT and BDOS jump + &100-&3f00 of the TPA. This calls to functions in Page c7.
 
a) Page C4 has WBOOT and BDOS jump + &100-&3f00 of the TPA. This calls to functions in Page c7.
 
b) Page C5 has &4000-&7fff of the TPA.
 
b) Page C5 has &4000-&7fff of the TPA.
 
c) Page C6 has &8000-&bfff of the TPA.
 
c) Page C6 has &8000-&bfff of the TPA.
 
d) Page C7 has &c000-&f2fb of the TPA. From &f2fc to &ffff is the trampoline code which transitions * to 1st bank of 64KB.
 
d) Page C7 has &c000-&f2fb of the TPA. From &f2fc to &ffff is the trampoline code which transitions * to 1st bank of 64KB.
 +
 +
=== Implementing a storage device driver ===
 +
 +
Using "drvtable" get the list of DPH for each drive. This is actually fixed at FE2F and is referenced by the XBIOS.
 +
 +
Amstrad have extended the DPH.
 +
* +23,+24 - address of a DD WRITE SECTOR (XBIOS) compatible function
 +
* +25,+26 - address of a DD READ SECTOR (XBIOS) compatible function
 +
* +27,+28 - unknown function, but does call DD LOGIN (XBIOS) if successful
 +
* +29,+31 - unknown function, calls RET
 +
 +
=== Links ===
 +
* [[https://www.seasip.info/Cpm/index.html|John Elliott's information about CPM 2.2 and CPM+ on the Amstrad]]
 +
  
 
[[Category:CP/M]][[Category:Operating System]]
 
[[Category:CP/M]][[Category:Operating System]]

Revision as of 06:44, 7 May 2018

CP/M 3.0 after boot

CPM 3.0 (also known as CPM+) was available on the 2nd System Disc for CPC6128 but there were other implementations available.

Graduate Software's implementation of CP/M+ on ROM

Amstrad's implementation of CP/M+

Amstrad distributed CP/M+ on the side 4 of the system discs that came with the CPC6128. It requires a Dk'Tronics compatible ram expansion. It provided 61K TPA. To get 61K TPA, CPM+ uses 'C1' and 'C2' RAM configuration with TPA in the 2nd bank and the CCP, BDOS, BIOS, screen and firmware in the 1st 64KB of RAM. This arrangement allows 61KB useable for programs.

On side 1 of the system discs was CP/M 2.2.

  • Amstrad CP/M+ uses Amstrad's "System" format. This is 40 tracks, 1 side, 9 sectors per track numbered &41-&49. Each sector is 512bytes. There are two reserved tracks, then the directory which has 64 entries (which occupies 4 sectors) and then the data area.
  • CP/M is booted using an RSX command "|CPM" which is implemented in the Amstrad disc rom (AMSDOS).
  • |CPM loads track 0, side 0, sector &41 into RAM at &100-&2ff. This is the boot sector and contains the boot program.
  • The boot program then loads the directory from track 2, sector &41.
  • The boot program locates a program with extension "EMS".
  • This program is loaded into RAM at &c00.
  • This is then executed. (EMS contains the BIOS, BDOS and relocates and re-configures the memory. CP/M doesn't use the CP/M 2.2 BIOS from the Amstrad disc ROM.)

Memory layout

  • 1st 64KB has Amstrad's XBIOS (callable using 'userf'), CCP, BDOS, BIOS, screen and firmware. Screen is at &4000-&7fff. Firmware is used. AMSDOS is not used.
  • &c1/&c2 are used, so that there is common code at &c000-&ffff. This common code has a small BDOS and BIOS. Most of the functions use trampoline code to transition to bank 0 and call into the XBIOS.
  • 2nd 64KB has the TPA and the shared code.

a) Page C4 has WBOOT and BDOS jump + &100-&3f00 of the TPA. This calls to functions in Page c7. b) Page C5 has &4000-&7fff of the TPA. c) Page C6 has &8000-&bfff of the TPA. d) Page C7 has &c000-&f2fb of the TPA. From &f2fc to &ffff is the trampoline code which transitions * to 1st bank of 64KB.

Implementing a storage device driver

Using "drvtable" get the list of DPH for each drive. This is actually fixed at FE2F and is referenced by the XBIOS.

Amstrad have extended the DPH.

  • +23,+24 - address of a DD WRITE SECTOR (XBIOS) compatible function
  • +25,+26 - address of a DD READ SECTOR (XBIOS) compatible function
  • +27,+28 - unknown function, but does call DD LOGIN (XBIOS) if successful
  • +29,+31 - unknown function, calls RET

Links