Difference between revisions of "Programming:Unlocking ASIC"
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* ACQ represents sending any value if STATE=205 (not needed otherwise). | * ACQ represents sending any value if STATE=205 (not needed otherwise). | ||
| − | Note | + | Note: the ASIC is already unlocked after the STATE phase, before ACQ. So ACQ is actually never needed. |
Once the ASIC is unlocked, we get access to a new [[Gate Array]] register called RMR2. It is accessible in the same way as other Gate Array registers. | Once the ASIC is unlocked, we get access to a new [[Gate Array]] register called RMR2. It is accessible in the same way as other Gate Array registers. | ||
| Line 51: | Line 51: | ||
= BASIC version = | = BASIC version = | ||
<pre> | <pre> | ||
| − | + | 10 RESTORE | |
| − | + | 20 FOR x=0 TO 16:READ a:OUT &BC00,a:NEXT | |
| + | 30 DATA 255,0,255,119,179,81,168,212,98,57,156,70,43,21,138,205,238 | ||
| + | 40 PRINT"ASIC unlocked!" | ||
</pre> | </pre> | ||
| + | |||
| + | <br> | ||
[[Category:Programming]] | [[Category:Programming]] | ||
[[Category:CPC Plus]] | [[Category:CPC Plus]] | ||
Latest revision as of 10:59, 16 November 2024
To unlock the ASIC, a 17-byte "unlock" sequence must be sent to the CRTC's selection port (&BC00) : RQ00, 0, 255, 119, 179, 81, 168, 212, 98, 57, 156, 70, 43, 21, 138, STATE, <ACQ>
- RQ00 must be different from the value 0.
- STATE=205 for UNLOCK otherwise another value for LOCK.
- ACQ represents sending any value if STATE=205 (not needed otherwise).
Note: the ASIC is already unlocked after the STATE phase, before ACQ. So ACQ is actually never needed.
Once the ASIC is unlocked, we get access to a new Gate Array register called RMR2. It is accessible in the same way as other Gate Array registers.
Z80 Assembler version
;; This example shows how to unlock the ASIC ;; ;; This example is designed for CPC+ only and will ;; not work on CPC or KC Compact. ;; ;; This example will compile with the MAXAM assembler ;; or the built-in assembler of WinAPE32. org &8000 ;;-------------------------------------------------- ;; Unlock CPC+ additional features di ld b,&bc ld hl,sequence ld e,17 .seq ld a,(hl) out (c),a inc hl dec e jr nz,seq ei ret ;;---------------------------------------------------------- ;; this is the sequence to unlock the ASIC extra features .sequence defb &ff,&00,&ff,&77,&b3,&51,&a8,&d4,&62,&39,&9c,&46,&2b,&15,&8a,&cd,&ee
Note: As one may see, the nybbles in the sequence are based on two 4bit shift registers. For one reason or another, Amstrad has patented the verification mechanism (GB2243701A). The patent seems to focus on verifying (rather than on sending) the sequence, so its legal use is a bit unclear.
BASIC version
10 RESTORE 20 FOR x=0 TO 16:READ a:OUT &BC00,a:NEXT 30 DATA 255,0,255,119,179,81,168,212,98,57,156,70,43,21,138,205,238 40 PRINT"ASIC unlocked!"
